Avalon Multi-port SDRAM Memory Controller IP Core Version 5.4

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Released: 9 July 2010

Revision History

Version: 5.4, Issued: July 9, 2010

• Added support for Arria II GX
• Fixed bug in DDR generator script
• Fixed bug in generator script for Stratix II

Version: 5.3.2, Issued: Apr. 5, 2010

• Updated generation of read latency value for SDR

Version: 5.3.1, Issued: Mar. 26, 2010

• Moved execution of Quartus settings script to hw.tcl
• Fixed bugs in generation script for SDR

Version: 5.3, Issued: Feb. 11, 2010

• Added support for Cyclone IV E and Cyclone IV GX

Version: 5.2.3, Issued: Feb. 4, 2010

• Fixed generator script error on single DQS

Version: 5.2.2, Issued: Jan. 12, 2010

• Added missing CMD_CLK to SOPC component

Version: 5.2.1, Issued: Dec. 22, 2009

• Fixed bug in Mobile DDR generator script

Version: 5.2, Issued: Dec. 10, 2009

• New faster GUI based on Altera's latest framework in Quartus 9.1
• Generation script now saves previous .sdc and .tcl files with .bak extension before overwriting
• Ports now signal waitrequest until SDRAM initialization is complete
• Added user-settable parameter to scheduler for use in custom designs
• Added setting to support small HardCopy 2/3 devices without DDR blocks
• Improved SDC constraints
• Fixed bug in SDR reads

Version 5.1.2, Issued: August 28, 2009

• Fixed burst port off-by-one error during write bursts where write is discontinuous

Version: 5.1.1, Issued: June 8, 2009

• Improved DQS input filtering

Version: 5.1, Issued: April 16, 2009

• Added support for TimeQuest support for DDR2 devices
• Increased ports to sixteen
• Added optional command/address clock
• Improved port scheduler
• Improved datapath to increase fmax
• Improved support for multiple controllers in a single design
• Removed "streaming" port type

Version: 4.1.5, Issued: Dec. 22, 2008

• Fixed bug in Cyclone II LAB assignment script

Version: 4.1.4, Issued: Nov. 26, 2008

• Increased timing counter widths to support higher clock frequencies

Version: 4.1.3, Issued: Nov. 7, 2008

• Updated installer for Quartus II 8.1

Version: 4.1.2, Issued: Oct. 30, 2008

• Fixed bug with CKE timing

Version: 4.1.1, Issued: Sep. 29, 2008

• Initial release supporting Cyclone III & DDR2 devices only

Version: 4.1, Issued: Sep. 2, 2008

• Added support for Arria GX
• Added support for DLL in Stratix II and Arria GX
• Removed extra compilation stage for Cyclone III and Stratix II

Version: 4.0, Issued: Aug. 25, 2008

• Added support for Stratix III

Version: 3.3.1, Issued: Jun. 2, 2008

• Improved resource utilization of random port type

Version: 3.3, Issued: May 5, 2008

• Added support for Mobile DDR deep power down mode
• Added option to disable automatic tcl script execution

Version: 3.2.2, Issued: Dec. 11, 2007

• Fixed bug with short unaligned DDR2 writes

Version: 3.2.1, Issued: Nov. 21, 2007

• Fixed bug with multiple consecutive pipelined reads of full buffer size
• New version numbering scheme

Version: 3.2 Build 3, Issued: Sep. 27, 2007

• Added synchronous reset
• Added support for unaligned DDR2 transfers
• Added support for custom scheduling algorithms, see scheduler manual
• Fixed burst port bug

Version: 3.2 Build 2, Issued: Sep. 18, 2007

• Fixed bug with bursts crossing page boundaries in SDRAM

Version: 3.2 Build 1, Issued: Sep. 13, 2007

• Added fifth port option
• Added sixth port option

Version: 3.1 Build 4, Issued: Aug. 8, 2007

• OpenCore Plus eval working again with Altera's Quartus II 7.1SP1 Patch 1.13

Version: 3.1 Build 4

• Fixed bug causing code download problems with SDR on Nios II

3.1 Build 2

• Fixed bug with bursts of length (buffer+1)

3.1 Build 1

• Added clock pairs option
• Improved Stratix II data path
• Improved DQS logic structure

3.0 Build 1

• Added Cyclone III support
• Added cache disable option

2.8 Build 1

• Added avalon data width selection for burst port
• Added avalon data width selection for streaming port

2.6 Build 1

• Removed simple port type.
• Support Quartus II / Nios II 7.0

2.5 Build 1

• Added avalon data width selection for streaming port.
• Added ODT support.
• Fixed burst port datavalid/dataenable behaviour.

2.3 Build 3

• Fixed burst port buffer error (16-word buffer)
• Fixed burst port clocking error (very slow Avalon clock + very fast SDRAM clock)

2.3 Build 2

• Fixed GUI parameter bug
• Fixed minor SDR bug

2.3 Build 1

• Added avalon burst slave
• Added third port option
• Added forth port
• Added Mobile DDR support
• Added DDR2 support
• Fixed minor scripting bugs

1.7 Build 2

• Fixed scripting bug

1.7 Build 1

• Added SDRAM timing parameters tRAS and tRC
• Added Streaming port cache release parameter
• Added reduced drive strength option
• Added sdram devices option
• Improved GUI
• Fixed minor bugs

1.3 Build 3

• Fixed SDR scripting bug

1.3 Build 2

• Improved performance of random and streaming port types

1.3 Build 1

• Added dual port variable for Nios IDE
• Added wizard finish section
• Fixed DQ/DQS mismatch for 32-bit DDR

1.0 Build 2

• Fixed Opencore+ timeout

1.0 Build 1

• Initial release