Automotive electronics manufacturer required an FPGA based embedded processor platform to support enhanced in-dash video display system.

 

The goal was to build a low cost based embedded video system with integrated Nios processor to control the display of information. The challenge was how to resolve the DDR memory access conflicts between the streaming video data sources and the Nios processor. When contentions occur, either the video display was impacted or user interface degraded.

 

Microtronix developed custom multi-port Avalon memory controller to support streaming video in conjunction with an FPGA based Nios embedded soft-core processor. This was the first application of a FIFO based memory interface for streaming video systems.

 

Engineers conceived and developed a FIFO based multi-port streaming memory controller which maximized the available memory bandwidth by using contiguous back-to-back burst mode access cycles. When combined with a unique look ahead control mechanism to empty and fill the FIFO's it was possible to eliminate memory contentions and its associated negative impact on the quality of the display.