High volume electronics manufacturer required a drop-in part replacement upgrade for an end-of-life PC133, ECC registered SDR 144-pin SODIMM. The driving force behind this project is for the customer the costly development of a new ASIC and board redesign. A drop-in replacement will extend the life of existing products and ASIC inventory.

 

Develop an FPGA based SDR – MDDR Bridge IP Core capable of translating the timings of the SDR memory interface to the timings used by MDDR devices and to provide a functional upgrade path for the existing SODIMM module. As a drop-in upgrade, the design must fully comply with the timings existing ASIC, board delays and memory interface while complying with the tREF refresh, CAS latency CL and device initialization requirements of the MDDR substitute memory.

 

Microtronix designed a functionally compatible memory architecture based on 1Gb MDDR devices which could comply with the mappings for row and column addresses of the original SDR SODIMM module. A Cyclone III device was used to meet the required cost objectives.

During the design phase, it was discovered the ASIC fast and slow corner timings combined with onerous signal propagation delays of the board placed significant constraints on the implementation. Although conceptually simple, the timing margins provided a data capture window of only 2ns. To assure operation over PVT (process, voltage, temperature) and fast / slow corner skews, it was necessary to simulate a back annotated design using post placement routing. Timings could only be resolved with hand placement of critical nets.

 

Microtronix achieved the design objectives of a drop-in SODIMM replacement upgrade avoiding a costly engineering development. The design operated at rated bus speed over the full industrial temperature from -40C to +80C. The use of MDDR memory assured product life expectancy.